1. Field of the Invention
The invention relates to simulating an area of interest on a lithographic mask, and specifically to using design geometry information outside the area of interest to improve the accuracy of the simulation.
2. Discussion of the Related Art
To fabricate an integrated circuit (IC) on a semiconductor substrate, a physical representation (i.e. a pattern) of the IC is transferred onto a pattern tool. Then, the pattern tool is exposed to transfer this pattern onto the semiconductor substrate. A mask is a standard pattern tool used in IC processing. Typically, a mask includes patterns that can be transferred to the entire semiconductor substrate (for example, a wafer) in a single exposure. A reticle, another standard pattern tool, must be stepped and repeated to expose the entire substrate surface. For ease of reference herein, the term “mask” refers to either a reticle or a mask.
In high-density IC designs, those skilled in the art of IC fabrication have recognized the importance of using masks that provide accurate representations of the original design layout. Unfortunately, a “perfect” mask is not commercially viable. In fact, even under optimal manufacturing conditions, some mask defects can occur outside the controlled process. A defect on a mask is any deviation from the design database (i.e. an irregularity) that is deemed unacceptable by an inspection tool or an inspection engineer.
After fabrication, the mask can be inspected for defects by scanning the surface of the mask and capturing images of the mask with an inspection tool. Defects in the mask are typically identified in a list by their locations. In one embodiment, the mask has an associated grid pattern and the list designates the squares in the grid pattern in which the defects are located. This inspection and defect identification can be performed by specialized equipment/software provided by companies such as KLA-Tencor or Applied Materials.
A captured image of the mask can be used to produce a simulated wafer image, thereby facilitating defect correction of the mask. FIG. 1 illustrates a simplified system 100 including a simulation engine 102 receiving mask inspection input 101 and generating wafer simulation output 103. Mask inspection input 101 can include image information from an inspected lithographic mask, whereas wafer simulation output 103 can include simulated wafer information generated by using the mask inspection input 101. The simulated wafer information could include, for example, a bit map of an area of interest including a defect, specific data regarding a critical dimension of a feature including a defect, and/or a severity score associated with a defect. Simulation engine 102 can be implemented using known tools, such as the Virtual Stepper® System (VSS) tool licensed by Numerical Technologies, Inc.
Mask inspection input 101 can be stored for subsequent use by simulation engine 102. However, because of the high cost associated with this storage, the amount of mask inspection input 101 is minimized, if possible. In fact, in one known inspection process, when simulation engine 102 receives a captured image from the mask, an inspection engineer performs a manual analysis of that image before the simulation proceeds. In this manner, the number of images that will be stored and simulated is decreased, thereby minimizing associated storage costs.
As features on lithographic masks get smaller, the resolution of inspection tools is typically increased to ensure that areas of interest on those masks can be adequately analyzed. Therefore, as the resolution increases, more data is stored per unit of area associated with a captured image. To minimize the need for more data storage, the maximum size of an image that can be captured by an inspection tool is typically reduced. In other words, as the resolution of inspection tools is increased, the maximum field of view of the captured images is generally reduced. More generally, although a high magnification image offers a better resolution than a low magnification image, it is not possible to get the entire environment on the high resolution image because of current k1, which measures lithography aggressiveness related to the critical dimension (CD) (specifically, CD=k1×(wavelength/numerical aperture)).
An area of interest on a mask, typically including a defect, can be smaller than or equal to the size of the captured image. In one simulation engine, the user can define the area of interest by using a mouse in a click-and-drag motion over a captured image from the mask. In another simulation engine, the area of interest can be system defined based on a number of criteria including, for example, the size, type, and/or orientation of a defect in light of certain features neighboring the defect. Alternatively, in one inspection tool, the user can define the area of interest using the same method described above or a different method. In another inspection tool, the size of the area of interest can be system defined based on the same criteria listed above or different criteria. Generally, the information associated with the area of interest, rather than the captured image, is stored for further processing by the simulation engine.
Including information regarding proximate features outside the area of interest can advantageously improve the accuracy of the simulated wafer image. Note that the term “proximate” can refer to any feature that has an effect on a critical dimension (CD) of a feature or final results in the area of interest as a result of its proximity to the area of interest. For example, in one implementation explained in further detail below, any feature within a predetermined distance of the area of interest can be identified as a proximate feature. Further, the feature may be “within” the area of interest, e.g. a portion of the feature is within the area.
Therefore, for the moment ignoring the associated storage costs, it would be advantageous to provide a captured image with a larger field of view. However, if the inspection tool attempts to generate a larger captured image, then the resolution of that captured image can be adversely affected. For example, a larger captured image may result in the defect not even being seen.
Alternatively, if one inspection tool could not provide the desired captured image size (and resolution), then the mask could be transferred to another inspection tool providing the desired captured image size (and resolution). However, this transfer in an otherwise automated process causes an interruption, which has a high associated cost. Moreover, inspection tools that could provide an enhanced resolution while still generating an extra large captured image would be extremely expensive and probably take an unacceptable amount of time to generate such an image.
Note that a standard inspection tool could generate multiple captured images and then “stitch” together those images to form a mega image. However, each captured image processed by simulation engine 102 is typically represented by pixels, i.e. a significant amount of data. As described previously, storing this amount of data can be very expensive. Therefore, forming a mega image for each area of interest, which logically requires significantly greater storage needs than a single image, could be prohibitively expensive solely because of storage costs. It may also slow the inspection process by requiring capturing multiple inspection tool images out of standard process order.
Therefore, a need arises for accurately simulating areas of interest on a lithographic mask while minimizing costs associated with interruption of the inspection process and storage of the captured images.